An analog-to-digital converter (ADC) is an electronic circuit that converts an analog signal into a digital value that represents the analog signal. One well-known type of ADC is a successive approximation register (SAR) ADC. A SAR ADC includes a digital-to-analog converter (DAC), which may be implemented with a series of capacitors and a number of switches. The capacitors have top plates that are connected together, and bottom plates that are individually connectable by way of the switches to an input voltage, a reference voltage, and ground.
The capacitors include a number of binary-valued capacitors, such as 1C, 2C, 4C, 8C, and 16C, where 1C represents the capacitance and plate area of the smallest capacitor that can be fabricated with a given process. A 16C capacitor has 16× the capacitance and plate area of the 1C capacitor, while an 8C capacitor has 8× the capacitance and plate area of the 1C capacitor.
The binary-valued capacitors include a 1C dummy capacitor that allows the capacitor values to be evenly divided. For example, the first four binary-valued capacitors (1C, 2C, 4C, 8C) in combination with the 1C dummy capacitor have a total capacitance of 16C, which is equal to the fifth binary-valued capacitor (16C). Similarly, the first three binary-valued capacitors (1C, 2C, 4C) in combination with the 1C dummy capacitor have a total capacitance of 8C, which is equal to the fourth binary-valued capacitor (8C).
Each of the binary-valued capacitors, with the exception of the dummy capacitor, corresponds to a bit in the digital word output by the SAR ADC. For example, a SAR ADC that outputs a five-bit word typically has six binary-valued capacitors, five bit capacitors and one dummy capacitor.
The largest binary-valued capacitor (16C in the present example) represents the most significant bit (MSB), while the smallest binary-valued capacitor (1C in the present example) represents the least significant bit (LSB). In addition to the capacitive-based DAC, a SAR ADC also includes a comparator and a controller.
In operation, the capacitive-based DAC receives a sequence of control words from a DAC controller, which controls the positions of the switches which, in turn, determine whether the input voltage, the reference voltage, or ground is connected to the binary-weighted capacitors.
The sequence of connecting and reconnecting the voltages generates a sequence of DAC voltages at the input of the comparator, which compares the sequence of DAC voltages to ground, and outputs a sequence of logic values that represents the results of the comparisons. The controller interprets the sequence of logic values, and sequentially assigns a logic state to each bit position in the digital word that represents the input voltage.
A high-resolution SAR ADC can be formed by increasing the number of bits within the digital word that represents the input voltage. For example, a SAR ADC that outputs a 10-bit word has a much higher resolution than a SAR ADC that outputs a 5-bit word. However, as the number of bits increase, the size of the largest binary-valued capacitor significantly increases. The largest capacitor in a 5-bit word is 16× larger than the smallest capacitor, whereas the largest capacitor in a 10-bit word is 512× larger. Accordingly, a high resolution SAR ADC may include a large number of capacitors.